Quatech MPA-200 Uživatelský manuál Strana 28

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D1 -RXSRC, RECEIVE DMA SOURCE:
When set (logic 1), this bit allows the source for receive DMA to
come from the W/REQB pin of channel B on the SCC. When
cleared (logic 0), the source for receive DMA comes from the
W/REQA pin of channel A on the SCC.
D0 -TXSRC, TRANSMIT DMA SOURCE:
When set (logic 1), this bit allows the source for transmit DMA to
come from the DTR/REQA pin of channel A on the SCC. When
cleared (logic 0), the source for transmit DMA comes from the
W/REQA pin of channel A on the SCC.
NOTE:
If both D0 and D1 are cleared (logic 0), then the transmit
and receive DMA requests both come from the W/REQA
pin of channel A on the SCC. Proper board function is
not guaranteed under this condition.
Quatech Inc., MPA-200/300 Manual 22
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