Quatech RS-232 Uživatelský manuál Strana 54
- Strana / 55
- Tabulka s obsahem
- KNIHY
- MPAC-100 1
- RS-232 PCI 1
- SYNCHRONOUS ADAPTER 1
- User's Manual 1
- 1 Introduction 7
- 1.1 System Requirements 7
- 2 Hardware Installation 8
- 3 Windows 95/98 Installation 9
- 4 Other Operating Systems 14
- 4.1 Windows NT 14
- 4.2 OS/2 14
- 4.4 QTPCI.EXE 14
- 6 Addressing 19
- 7 Interrupts 20
- 8 SCC General Information 21
- 8.1 Accessing the registers 22
- 8.3 SCC Data Encoding Methods 25
- 8.5.1 Register Pointer Bits 27
- 9 FIFO Operation 28
- 9.2 Accessing the FIFOs 28
- 9.2.1 Transmit FIFO 28
- 9.2.2 Receive FIFO 29
- 9.4 FIFO status and control 32
- 9.4.1 Interrupt status 32
- 9.4.2 Resetting the FIFOs 33
- 9.4.4 Controlling the FIFOs 33
- 9.6 Receive pattern detection 34
- 9.7 Receive FIFO timeout 35
- 10 Communications Register 36
- 11 Configuration Register 38
- 12 Interrupt Status Register 40
- 13 FIFO Status Register 41
- 14 FIFO Control Register 42
- 18 External Connections 46
- 18.1 5V fuse (pin 9) 47
- 18.2 SYNCA (pin 10) 47
- 18.3 RING (pin 22) 47
- 18.4 Null-modem cables 49
- 19 DTE Interface Signals 50
- 20 PCI Resource Map 53
- 21 Specifications 54
- MPAC-100 User's Manual 55
- Revision 1.01 55
- June 2001 55
- P/N 940-0090-220 55
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